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HSSR-7110, hssr-7111, hssr-7112, hssr-711e 5962-93140 90 v/1.0 , hermetically sealed, power mosfet optocoupler data sheet features ? dual marked with device part number and dla standard microcircuit drawing ? ac/dc signal &power switching ? compact solid-state bidirectional switch ? manufactured and tested on a mil-prf-38534certifi ed line ? qml-38534 ? mil-prf-38534 class h ? modifi ed space level processing available (class e) ? hermetically sealed 8-pin dual in-line package ? small size and weight ? performance guaranteed over -55c to 125c ? connection a0.8 a, 1.0 ? connection b1.6 a, 0.25 ? 1500 vdc withstand test voltage ? high transient immunity ? 5 amp output surge current applications ? military and space ? high reliability systems ? standard 28 vdc and 48 vdc load driver ? standard 24 vac load driver ? aircraft controls ? ac/dc electromechanical and solid state relay replacement ? i/o modules ? harsh industrial environments description the HSSR-7110, hssr-7111, hssr-7112, hssr-711e and smd 5962-93140 are single channel power mosfet opto- couplers, constructed in eight-pin, hermetic, dual-in-line, ceramic packages. the devices operate exactly like a solid- state relay. the products are capable of operation and storage over the full military temperature range and may be pur- chased as a standard product (HSSR-7110), with full mil- prf-38534 class h testing (hssr-7111 and hssr- 7112), with mil-prf-38534 class e testing (class k with excep- tions) (hssr-711e) or from the dla standard microcircuit drawing (smd) 5962-93140. details of the class e program may be found on page 11 of this datasheet. functional diagrams connection a ac/dc connection 2 3 4 1 6 7 5 8 nc nc + - + - connection b dc connection i f v f i o v o 2 3 4 1 6 7 5 8 nc nc + - + - i f v f i o v o truth table input output h closed l open caution: it is advised that normal static precautions be taken in handling and assembly of this component to prevent damage and/or degradation which may be induced by esd.
2 all devices are manufactured and tested on a mil- prf-38534 certifi ed line and are included in the dla qual- ifi ed manufacturers list, qml-38534 for hybrid microcir- cuits. each device contains an algaas light emitting diode optically coupled to a photovoltaic diode stack which drives two discrete power mosfets. the device oper- ates as a solid-state replacement for single-pole, normally open, (1 form a) relay used for general purpose switching of signals and loads in high reliability applications. the devices feature logic level input control and very low output on-resistance, making them suitable for both ac and dc loads. connection a, as shown in the functional diagram, allows the device to switch either ac or dc loads. connection b, with the polarity and pin confi guration as shown, allows the device to switch dc loads only. the ad- vantage of connection b is that the on-resistance is sig- nifi cantly reduced, and the output current capability in- creases by a factor of two. the devices are convenient replacements for mechanical and solid state relays where high component reliability with standard footprint lead confi guration is desirable. devices may be purchased with a variety of lead bend and plating options. see selection guide table for details. standard microcircuit drawing (smd) parts are available for each package and lead style. the HSSR-7110, hssr-7111, hssr-7112, hssr-711e and smd 5962-93140 are designed to switch loads on 28 vdc power systems. they meet 80 v surge and 600 v spike requirements. selection guide C lead confi guration options avago technologiess part number and options commercial HSSR-7110 mil-prf-38534 class h hssr-7111 hssr-7112 mil-prf-38534 class e hssr-711e standard lead finish gold plate gold plate gold plate solder dipped* option #200 option -200 option -200 butt joint/gold plate option #100 option -100 gull wing/soldered* option #300 option -300 crew cut/gold plate option #600 smd part number prescript for all below 5962- 5962- gold plate 9314001hpc 9314002hpc 9314001epc solder dipped* 9314001hpa 9314002hpa 9314001epa butt joint/gold plate 9314001hyc 9314002hyc butt joint/soldered* 9314001hya 9314002hya gull wing/soldered* 9314001hxa 9314002hxa crew cut/gold plate 9314001hzc crew cut/soldered* 9314001hza * solder contains lead caution: maximum switching frequency C care should be taken during repetitive switching of loads so as not to exceed the maximum output current, maximum output power dissipation, maximum case temperature, and maximum junction temperature.
3 thermal resistance maximum output mosfet junction to case C jc = 15c/w esd classifi cation (mil-std-883, method 3015) .......................... ( ), class 2 outline drawing 8-pin dip through hole device marking 3.81 (0.150 ) min. 4.32 (0.170 ) max. 9.40 (0.370) 9.91 (0.390) 0.51 (0.020 ) max. 2.29 (0.090) 2.79 (0.110) 0.51 (0.020) min. 0.76 (0.030) 1.27 (0.050) 8.13 (0.320) max. 7.36 (0.290) 7.87 (0.310) 0.20 (0.008 ) 0.33 (0.013 ) 7.16 (0.282 ) 7.57 (0.298 ) note: dimensions in millimeters (inches). compliance indicator, * date code, suffix a qyywwz xxxxxx xxxxxxx xxx xxx 50434 country of mfr. avago cage code* avago designator dla smd* pin one/ esd ident avago p/n dla smd* * qualified parts only (if needed) abso l u t e ma x imum ra t ings parame t er s y mbo l min. ma x . uni t sno t e storage t emperature range t s -65 + 150 c operating ambient t emperature t a -55 + 125 c junction t emperature t j + 150 c operating case t emperature t c + 145 c1 lead so l der t emperature ( 1.6 mm be l ow seating p l ane ) 260 for 10 sc a v erage i nput current i f 20 ma pea k repetiti v e i nput current ( pu l se width < 100 ms ; duty cyc l e < 50 %) i f p k 40 ma pea k surge i nput current ( pu l se width < 0.2 ms ; duty cyc l e < 0.1 %) i f p k surge 100 ma re v erse i nput vo l tage v r 5v a v erage output current - f igure 2 connection a connection b i o 0.8 1.6 a a sing l e shot output current - f igure 3 connection a ( pu l se width < 10 ms ) connection b ( pu l se width < 10 ms ) i op k surge 5.0 10.0 a a output vo l tage connection a connection b v o -90 0 90 90 v v a v erage output power dissipation - f igure 4 800 mw 2
4 recommended operating conditions parameter s y mbol min. ma x . units note input current ( on ) i f ( on ) 520ma10 input current ( on ) i f ( on ) 10 20 ma 11 input voltage ( off ) v f ( off ) 0 0.6 v operating temperature t a -55 + 125 c hermetic optocoupler options note: dimensions in millimeters (inches). option description 100 surface mountable hermetic optocoupler with leads trimmed for butt joint assembly. this option is available on commercial and hi-rel product. 200 lead fi nish is solder dipped rather than gold plated. this option is available on commercial and hi-rel product. dla drawing part numbers contain provisions for lead fi nish. 300 surface mountable hermetic optocoupler with leads cut and bent for gull wing assembly. this option is available on commercial and hi-rel product. this option has solder dipped leads. 600 surface mountable hermetic optocoupler with leads trimmed for butt joint assembly. this option is available on commercial and hi-rel product. note: solder contains lead. 1.14 (0.045) 1.40 (0.055) 4.32 (0.170) max. 0.51 (0.020) max. 2.29 (0.090) 2.79 (0.110) 0.51 (0.020) min. 7.36 (0.290) 7.87 (0.310) 0.20 (0.008) 0.33 (0.013) 0.51 (0.020) min. 4.57 (0.180) max. 0.51 (0.020) max. 2.29 (0.090) 2.79 (0.110) 1.40 (0.055) 1.65 (0.065) 9.65 (0.380) 9.91 (0.390) 5? max. 4.57 (0.180) max. 0.20 (0.008) 0.33 (0.013) 3.81 (0.150) max. 1.02 (0.040) typ. 2.29 (0.090) 2.79 (0.110) 0.51 (0.020) min. 7.36 (0.290) 7.87 (0.310) 0.20 (0.008) 0.33 (0.013) 1.07 (0.042) 1.31 (0.052)
5 e l ec t rica l specifica t ions t a = -55c to +1 25c, un l ess otherwise spe c ified. see note 9. parame t er s y m. group a , sub - group t es t condi t ions min. ty p.* ma x . uni t s f ig. no t es output withstand vo l tage | v o ( o ff) | 1, 2, 3v f = 0.6 v, i o = 10 p a 90 110 v 5 output on-resistance connection a r ( on ) 1, 2, 3 i f = 10 ma, i o = 800 ma, ( pu l se duration 30 ms ) 0.40 1.0 : 6, 7 3, 11 i f = 5 ma, i o = 800 ma, ( pu l se duration 30 ms ) 1.0 3, 10 output on-resistance connection b r ( on ) 1, 2, 3 i f = 10 ma, i o = 1.6 a, ( pu l se duration 30 ms ) 0.12 0.25 : 6, 7 3, 11 i f = 5 ma, i o = 1.6 a, ( pu l se duration 30 ms ) 0.25 3, 10 output lea k age current i o ( o ff) 1, 2, 3v f = 0.6 v, v o = 90 v10 -4 10 p a8 i nput f orward vo l tage v f 1, 2, 3 i f = 10 ma 1.0 1.24 1. 7 v911 i f = 5 ma 10 i nput re v erse brea k down vo l tage v r 1, 2, 3 i r = 100 p a 5.0 v i nput-output i nsu l ation i i -o 1r h 65 % , t = 5 s, v i -o = 1500 vdc, t a = 25 c 1.0 p a4, 5 t urn on t ime t on 9, 10, 11 i f = 10 ma, v dd = 28 v, i o = 800 ma 1.25 6.0 ms 1, 10, 11, 12, 13 11 i f = 5 ma, v dd = 28 v, i o = 800 ma 6.0 10 t urn off t ime t o ff 9, 10, 11 i f = 10 ma, v dd = 28 v, i o = 800 ma 0.02 0.25 ms 1, 10, 14, 15 11 i f = 5 ma, v dd = 28 v, i o = 800 ma 0.25 10 output t ransient re j ection dvo dt 9v p e a k = 50 v, c m = 1000 p f , c l = 15 p f , r m 1 m : 1000 v/ p s1 7 i nput-output t ransient re j ection dvio dt 9v dd = 5 v, v i -o ( p e a k) = 50 v, r l = 20 k : , c l = 15 p f 500 v/ p s18
6 ty pica l charac t eris t ics a ll typi c a l va l ues are at t a = 25c, i f (on) = 1 0 ma, v f (off) = 0.6 v un l ess otherwise spe c ified. notes: 1 . maximum jun c tion to c ase therma l resistan c e for the devi c e is 1 5c/w, where c ase temperature, t c , is measured at the c enter of the pa c kage bottom. 2. for rating, see figure 4. t he output power p o rating c urve is obtained when the part is hand l ing the maximum average output c urrent i o as shown in figure 2. 3. during the pu l sed r on measurement (i o duration < 30 ms), ambient ( t a ) and c ase temperature ( t c ) are equa l . 4. devi c e c onsidered a two termina l devi c e: pins 1 through 4 shorted together and pins 5 through 8 shorted together. 5. t his is a momentary withstand test, not an operating c ondition. 6. for a faster turn-on time, the optiona l peaking c ir c uit shown in figure 1 may be imp l emented. 7. v os is a fun c tion of i f , and is defined between pins 5 and 8, with pin 5 as the referen c e. v os must be measured in a stab l e ambient (free of tem- perature gradients). 8. z ero-bias c apa c itan c e measured between the led anode and c athode. 9. standard parts re c eive 1 00 % testing at 25c (subgroups 1 and 9). smd, c l ass h and c l ass e parts re c eive 1 00 % testing at 25c, 1 25c and -55c (subgroups 1 and 9, 2 and 1 0, 3 and 11 respe c tive l y). 1 0. app l ies to hssr-7 11 2 and 5962-93 1 4002hxx devi c es on l y. 11 . app l ies to hssr-7 11 0, hssr-7 111 , hssr-7 11 e, 5962-93 1 400 1 hxx and 5962-93 1 400 1 exx devi c es on l y. parame t er s y mbo lt es t condi t ions ty p. uni t s f ig. no t es output off-capacitance c o ( o ff) v o = 28 v, f = 1 m hz 145 p f 16 output offset vo l tage | v os |i f = 10 ma, i o = 0 ma 2 p v19 7 i nput diode t emperature coe ffi cient ' v f / ' t a i f = 10 ma -1.4 mv/ c i nput capacitance c i n v f = 0 v, f = 1m hz 20 p f 8 i nput-output capacitance c i -o v i -o = 0 v, f = 1 m hz 1.5 p f 4 i nput-output resistance r i -o v i -o = 500 v, t = 60 s10 13 : 4 t urn on t ime with pea k ing t on i f p k = 100 ma, i f ss = 10 ma v dd = 28 v, i o = 800 ma 0.22 ms 1 6 r1 = required current limiting resistor for i f (on) = 10 ma. r2 = pull-up resistor for v f (off) < 600 mv; i f (v cc -v oh ) < 600 mv, omit r2. r3, c = optional peaking circuit. typical values r3 ( ) i f (pk) (ma) HSSR-7110 t on (ms) - 330 100 33 10 (no pk) 20 40 100 2.0 1.0 0.48 0.22 * use second gate if i f (pk) > 50 ma reminder: tie all unused inputs to ground or v cc in 1/4 54actoo* 1/4 54actoo v cc (+5v) r2 1200 r1 330 r3 c 15 f HSSR-7110 2 3 4 1 6 7 5 8 - i f v f + figure 1. recommended input circuit.
7 f igure 2. ma x imum average ou t pu t curren t ra t- ing vs. ambien t t empera t ure. f igure 3. sing l e sho t (non - repe t i t ive) ou t pu t curren t vs. pu l se dura t ion. f igure 4. ou t pu t power ra t ing vs. ambien t t empera t ure. f igure 6. norma l i z ed ty pica l ou t pu t resis t ance vs. t empera t ure. f igure 5. norma l i z ed ty pica l ou t pu t wi t hs t and vo lt age vs. t empera t ure. f igure 7. ty pica l on s t a t e ou t pu t i- v charac t er - is t ics. f igure 9. ty pica l i npu t f orward curren t vs. i npu t f orward vo lt age. f igure 8. ty pica l ou t pu t leakage curren t vs. t empera t ure. 0 -55 t a - ambient temperature - ?c 1.0 0.4 155 125 95 65 5 -25 0.6 0.8 0.2 35 i o - output current - a connection - a i f 10 ma q ca = 40? c/w q ca = 80? c/w i opk surge - output current - a 3 1000 pulse duration - ms 8 5 400 200 6 7 4 9 10 11 12 600 800 i f 10 ma connection-a connection-b 10 0 -55 t a - ambient temperature - ?c 1.0 0.4 155 125 95 65 5 -25 0.6 0.8 0.2 35 p o - output power dissipation - w connection - a i f 10 ma q ca = 40? c/w q ca = 80? c/w v f = 0.6 v i o = 10 a -55 t a - ambient temperature - ?c 125 95 65 5 -25 0.92 35 normalized typical output withstand voltage 0.94 0.96 0.98 1.00 1.02 1.04 1.06 1.08 1.10 normalized typical output resistance -55 t a - ambient temperature - ?c 125 95 65 5 -25 0.6 35 0.8 1.0 1.2 1.4 1.6 1.8 connection - a i f 10 ma i o = 800 ma (pulse duration 30 ms) v o - output voltage - v i o - output current - a -0.6 0.6 0.4 0.2 -0.2 -0.4 -0.4 0 -0.2 0 0.2 0.4 0.6 0.8 -0.8 -0.6 connection - a i o 10 ma i o (pulse duration 30 ms) t a = 25?c t a = 125?c t a = -55?c -11 10 -7 10 -8 10 -9 10 -10 10 i o(off) - output leakage current - a t a - temperature - ?c 125 95 65 20 35 connection a v f = 0.6 v v o = 90 v t a = 25?c t a = 125?c t a = -55?c v f - input forward voltage - v 0.6 1.6 1.4 1.2 0.8 0.4 1.0 -1 10 -2 10 -4 10 -3 10 -5 10 -6 10 i f - input forward current - a
8 figure 10. switching test circuit for t on , t off . 50% 10% 50% 90% t on t off p.w. = 15 ms v o i f pulse gen. z o = 50 t f = t r = 5 ns r l gnd (c l includes probe and fixture capacitance) v dd c l = 25 pf i f monitor r (monitor) 200 gnd monitor node v o HSSR-7110 2 3 4 1 6 7 5 8 - i f v f + f igure 11 . ty pica l t urn on t ime vs. t empera t ure. f igure 1 2. ty pica l t urn on t ime vs. i npu t curren t . f igure 1 3. ty pica l t urn on t ime vs. vo lt age. f igure 1 4. ty pica l t urn o ff t ime vs. t empera t ure. f igure 1 5. ty pica l t urn o ff t ime vs. i npu t cur - ren t . f igure 1 6. ty pica l ou t pu t o ff capaci t ance vs. ou t pu t vo lt age. t a - temperature - ?c 0.8 2.2 2.0 1.8 1.6 1.4 1.2 1.0 2.4 2.6 t on - turn on time - ms -55 125 95 65 5 -25 35 connection a i f = 10 ma v dd = 28 v i o = 800 ma i f - input current - ma 10 15 20 5 0.2 2.2 1.8 1.4 1.0 0.6 2.6 3.0 t on - turn on time - ms connection a v dd = 28 v i o = 800 ma t a = 25?c v dd - voltage - v 10 30 20 0 0 1.0 0.8 0.6 0.4 0.2 1.2 1.4 t on - turn on time - ms 90 80 70 60 50 40 2.0 1.8 1.6 connection - a i f = 10 ma i o = 800 ma t a = 25?c t a -temperature - ?c 13.2 14.6 14.4 14.2 14.0 13.8 13.6 13.4 14.8 15.0 t off - turn off time - s -55 125 95 65 5 -25 35 connection a i f = 10 ma v dd = 28 v i o = 800 ma 5 40 35 30 25 20 15 10 45 t off - turn off time - s i f - input current - ma 10 15 20 5 connection a v dd = 28 v i o = 800 ma t a = 25?c v o(off) - output voltage - v 515 10 0 120 320 280 240 200 160 360 400 30 25 20 440 c o(off) - output off capacitance - pf connection a f = 1 mhz t a = 25?c
9 v i-o pulse generator + (c l includes probe plus fixture capacitance ) v o c l s 1 v dd v in b a r l - HSSR-7110 2 3 4 1 6 7 5 8 - i f v f + overshoot on v i-o(peak) is to be 10% t f t r dt dv i-o or = (0.8) v i-o(peak) (0.8) v i-o(peak) t f t r 90% 10% 90% 10% v i-o(peak) v o(off) v o(off) (min) 3.25 v s 1 at a (v f = 0 v) v o(on) (max) 0.8 v o(on) s 1 at b (i f = 10 ma) 11 or (i f = 5 ma) 10 figure 18. input-output transient rejection test circuit. figure 17. output transient rejection test circuit. monitor node - pulse generator v peak + c m includes probe and fixture capacitance r m includes probe and fixture resistance c m r m input open v m HSSR-7110 2 3 4 1 6 7 5 8 - i f v f + v peak t f t r 90% 10% 90% 10% v m overshoot on v peak is to be 10%. d t dv o or = t f (0.8) v (peak) t r (0.8) v (peak) (max) 5 v
10 applications information thermal model the steady state thermal model for the HSSR-7110 is shown in figure 21. the thermal resistance values given in this model can be used to calculate the temperatures at each node for a given operating condition. the thermal resistances between the led and other internal nodes are very large in comparison with the other terms and are omitted for simplicity. the components do, however, interact indirectly through ca, the case-to-ambient thermal resistance. all heat generated fl ows through ca , which raises the case temperature tc accordingly. the val- ue of ca depends on the conditions of the board design and is, therefore, determined by the designer. the maximum value for each output mosfet junction- to-case thermal resistance is specifi ed as 15c/w . the thermal resistance from fet driver junction-to-case is also 15c/w/w. the power dissipation in the fet driver, how- ever, is negligible in comparison to the mosfets. on-resistance and rating curves the output on-resistance, r on , specifi ed in this data sheet, is the resistance measured across the output contact when a pulsed current signal (i o = 800 ma) is applied to the output pins. the use of a pulsed signal ( 30 ms) im- plies that each junction temperature is equal to the am- bient and case temperatures. the steadystate resistance, r ss , on the other hand, is the value of the resistance mea- sured across the output contact when a dc current signal is applied to the output pins for a duration suffi cient to reach thermal equilibrium. r ss includes the eff ects of the temperature rise of each element in the thermal model. rating curves are shown in figures 2 and 4. figure 2 speci- fi es the maximum average output current allowable for a given ambient temperature. figure 4 specifi es the output power dissipation allowable for a given ambient tempera- ture. above 55c (for ca = 80c/w) and 107c (for ca = 40c/w/w), the maximum allowable output current and power dissipation are related by the expression rss = p o(max) / (i o(max) ) 2 from which r ss can be calculated. stay- ing within the safe area assures that the steady-state junc- tion temperatures remain less than 150c. as an example, for t a = 95c and ca = 80c/w , figure 2 shows that the output current should be limited to less than 610 ma. a check with figure 4 shows that the output power dissipa- tion at t a = 95c and i o = 610 ma, will be limited to less than 0.35 w. this yields an rss of 0.94 . figure 20. burn-in circuit. note: in order to determine v be measured for the burn-in boards to be used. then, knowing correct output current per figures 2 and 4 to insure that the device meets the derating requirements as shown. out correctly, the case to ambient thermal impedance must ca , determine the 2 3 4 1 6 7 5 8 r in v in 5.5 v 1.0 r out v o (see note) 200 1.0 r out HSSR-7110 figure 21. thermal model. t je = led junction temperature t jf1 = fet 1 junction temperature t jf2 = fet 2 junction temperature t jd = fet driver junction temperature t c = case temperature (measured at center of package bottom) t a = ambient temperature (measured 6" away from the package) ca = case-to-ambient thermal resistance all thermal resistance values are in ?c/w t je ca 104 15 t a t c t jd t jf1 15 15 t jf2 v os + digital nanovoltmeter isothermal chamber HSSR-7110 2 3 4 1 6 7 5 8 - i f + - figure 19. voltage o ff set test setup.
for product information and a complete list of distributors, please go to our web site: www.avagotech.com a v ago, a v ago technologies, and the a logo are trademar k s of a v ago technologies in the united states and other countries. data sub j ect to change. copyright ? 2005-2012 a v ago technologies. all rights reser v ed. obsoletes 5989-1944en av02-3835en - october 2, 2012 design considerations for replacement of electro- mechanical rela y s the HSSR-7110 family can replace electro-mechanical re- lays with comparable output voltage and current ratings. the following design issues need to be considered in the replacement circuit. input circuit: the drive circuit of the electro-mechanical relay coil needs to be modifi ed so that the average for- ward current driving the led of the hssr- 7110 does not exceed 20 ma. a nominal forward drive current of 10 ma is recommended. a recommended drive circuit with 5 volt vcc and cmos logic gates is shown in figure 1. if higher vcc voltages are used, adjust the current limiting resistor to a nominal led forward current of 10 ma. one impor- tant consideration to note is that when the led is turned off , no more than 0.6 volt forward bias should be applied across the led. even a few microamps of current may be suffi cient to turn on the hssr- 7110, although it may take a considerable time. the drive circuit should maintain at least 5 ma of led current during the on condition. if the led forward current is less than the 5 ma level, it will cause the HSSR-7110 to turn on with a longer delay. in addition, the power dissipation in the output power mosfets in- creases, which, in turn, may violate the power dissipation guidelines and aff ect the reliability of the device. output circuit: unlike electromechanical relays, the de- signer should pay careful attention to the output on-resis- tance of solid state relays. the previous section, on- re- sistance and rating curves describes the issues that need to be considered. in addition, for strictly dc applications the designer has an advantage using connection b which has twice the output current rating as connection a. fur- thermore, for dc-only applications, with connection b the on-resistance is considerably less when compared to con- nection a. output over-voltage protection is yet another important design consideration when replacing electro-mechanical relays with the HSSR-7110. the output power mosfets can be protected using metal oxide varistors (movs) or trans z orbs against voltage surges that exceed the 90 volt output withstand voltage rating. examples of sources of voltage surges are inductive load kickbacks, lightning strikes, and electro-static voltages that exceed the speci- fi cations on this data sheet. for more information on out- put load and protection refer to application note 1047. references: 1. application note 1047, low on-resistance solid state relays for high reliability applications. 2. reliability data for hssr-7111, hssr-7112, and hssr-711e. mov is a registered trademark of ge/rca solid state. trans z orb is a registered trademark of general semicon- ductor. mil-prf-38534 class h, class e and dla smd test pro- gram class h: avago technologies s hi-rel optocouplers are in compli- ance with mil-prf-38534 class h. class h devices are also in compliance with dla drawing 5962-93140. testing consists of 100 % screening and quality confor- mance inspection to mil-prf-38534. class e: class e devices are in compliance with dla drawing 5962- 9314001exx. avago technologies has defi ned the class e device on this drawing to be based on the class k require- ments of mil-prf-38534 with exceptions. the exceptions are as follows: 1. nondestructive bond pull, test method 2023 of mil- std-883 in device screening is not required. 2. particle impact noise detection (pind), test method 2020 of mil-std-883 in device screening and group c testing is not required. 3. die shear strength, test method 2019 of mil-std-883 in group b testing is not required. 4. internal water vapor content, test method 1018 of mil- std-883 in group c testing is not required. 5. scanning electron microscope (sem) inspections, test method 2018 of mil-std-883 in element evaluation is not required.

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